PS23429 - Qualitative Research on RISC-V

Description

***** THIS IS AN AWARD NOTICE, NOT A CALL FOR COMPETITION *****

This procurement is being concluded following a competitive procurement exercise.

Brief Description of Requirement

RISC-V is an instruction set architecture (ISA). An ISA defines the set of instructions that can be used by software running on a computer processor, linking hardware and software. The design of an ISA is fundamental to the security of systems built on processors that implement it. 
RISC-V is managed by the non-profit, RISC-V International, who manage the definition of the minimal base instruction set and a series of Instruction Set Extensions. As the Instruction Set Architecture and Instruction Set Extensions are publicly available, anyone can produce a processor design that implements the instruction set, royalty free, thereby lowering barriers to entry. RISC-V is widely used in academia and has emerging industrial potential.
Although RISC-V is open standard, there is no requirement for its implementations to be open. While there are a range of open-source implementations, there are also a growing range of companies who are creating proprietary RISC-V products and licensing them to the wider market, including in the UK.